Intel announces the arrival of the main components of the first EUV High-NA technology shipped by ASML.
Intel insists on Moore’s Law and celebrates the arrival of the main components of the first EUV High-NA technology, shipped by ASML, to continue its development beyond five nodes in four years.
This was announced on its X social media account. Intel will implement this technology to drive the roadmap of transistor innovations, with a view to producing with EUV High-NA from 2025.
Nearly two years ago, it joined forces with ASML and Intel and issued its first purchase order for the TWINSCAN EXE:5200 system to advance semiconductor lithography technology. This system offers 0.55 numerical aperture and throughput of more than 200 wafers per hour.
“Compared to current EUV systems, our innovative extended EUV roadmap offers continuous lithography improvements with lower complexity, cost, cycle time and power that the chip industry needs to drive affordable scaling well into the next decade,” said Intel’s then CTO, Martin van den Brink.
“Intel’s goal is to remain at the forefront of semiconductor lithography technology,” said Ann Kelleher, Intel’s general manager of Technology Development.
“Working closely with ASML,” she said, “we will leverage the high-resolution EUV High-NA pattern as one of the ways to continue Moore’s Law and maintain our strong history of progression down to the smallest geometries.”